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0216789abc System Memory Sizing and Publishing
The address space configured in a system depends on the amount of actual physical memory installed, on the RAS configuration, and on the PCIe* configuration. RAS configurations reduce the memory space available in return for the RAS features. PCIe* devices which require address space for Memory Mapped IO (MMIO) with 32-bit or 64- bit addressing, increase the address space in use, and introduce discontinuities in the correspondence between physical memory and memory addresses.
The discontinuities in addressing physical memory revolve around the 4GB 32-bit addressing limit. Since the system reserves memory address space just below the 4GB limit, and 32-bit MMIO is allocated just below that, the addresses assigned to physical memory go up to the bottom of the PCI allocations, then “jump” to above the 4GB limit into 64-bit space. See the comments below about Memory reservations.
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